How does a CPU work? – Part 3: From Schematic to Chip
01
The evolution of HDLs (Hardware Description Languages)
Hardware Description Languages (HDLs) and their use in modern digital design development In the first two parts of this series we designed …
02
Simulation and Testbenches
Simulation and Testbenches In the last chapter we saw that an HDL description can be used for documentation, simulation and synthesis. In …
03
Combinational Logic in Verilog
planned
Gates, full adders, decoders and the ALU from part 1 - this time as Verilog code.
04
Sequential Logic in Verilog
planned
Flip-flops, registers, counters and the traffic light from the chapter on finite state machines.
05
Arithmetic Units
planned
Barrel shifters, multipliers, and dividers—how hardware shifts, multiplies, and divides.
06
The CPU in Verilog
planned
Register file, data path and control unit from part 2 - our counter program runs in simulation.
07
From Code to Chip
planned
What happens during synthesis, place & route and timing analysis until the CPU runs on an FPGA.